Over 10× reduction in logical error rates with Meridian

The first fault-tolerant quantum computer will be designed with AI. That’s because a quantum computer's architecture determines how long the machine takes to build, and a good architecture can save years of development and several million dollars in capital expenditure. The advantage, therefore, goes to whoever can explore the design space more smartly and figure out which candidates are worth building. Today, that work depends on a small number of people with the breadth of expertise to do it.

Meridian is QC Design's purpose-built AI system for fault-tolerant quantum computing. It combines AI-driven design exploration with hardware-specific modelling and validation through Plaquette, our quantum design-automation software.

Meridian expands what architecture teams can explore.

Its specialized AI scientists draw on frontier models, human-curated knowledge bases and the validation and simulation tools of Plaquette, our quantum design-automation software. Plaquette provides an accurate world-model, allowing Meridian to test and validate candidates under realistic hardware imperfections and use the results to find architectures that hold up to the reality of hardware.

We test Meridian on one crucial layer of the stack: designing circuits that act on physical qubits to implement a given error-correction code on a device whose hardware layout and error model are specified. We run this test on an eval suite comprising over 100 tasks that span 10 code families and six connectivity classes, with error models representing all major hardware platforms. We compare Meridian with the best methods from published literature and a baseline agent running GPT-6 Astra on a reasonable harness, and we independently evaluate the performance of the generated circuits.

Across all the tasks, Meridian achieved a lower evaluated logical error rate than the best methods in published literature. Meridian’s median improvement versus literature was 14.6× with improvements ranging from 1.5× to over 22,000×. This means that for the median tasks, the same hardware could be used to run a 14.6× deeper circuit as compared to the best reported methods in literature.

Meridian’s performance extends beyond the gains from the impressive frontier models that it uses under the hood. Across all tasks, Meridian achieved a lower evaluated logical error rate than frontier-model alternatives, with a median reduction of 43%. Improvements reached 98.4%, equivalent to approximately 63× lower logical error as compared to frontier-model outputs.

In one of many striking examples, Meridian reduced logical errors by 29-fold relative to the reference circuit generated from published methods and by 40% relative to the baseline agent under the task's silicon-spin noise model.

These results provide early evidence that a purpose-built AI system can use an accurate world model and knowledge of quantum error correction to develop better designs. The next step is for Meridian to evaluate architecture choices across the full stack, measuring their effect on the physical qubits and runtime required for a logical computation.

Our aim is to give every hardware team the capacity to explore architectures it could not otherwise design, to understand why they work and to reach fault tolerance years sooner.